AI Memory

Circuit board and memory chips — AI memory systems research
Research Series
DOI pending
AI Memory

Oleh Ivchenko1

1 Odesa National Polytechnic University (ONPU)

Focus
KV-cache, context windows, attention memory, retrieval-augmented memory, memory-efficient inference
Articles
30 planned
Started
March 2026
Status
In Progress
30 Articles  ·  4 Research Phases  ·  2026  ·  In Progress
Abstract

How do large language models remember? The key-value cache is the dominant memory structure in transformer inference, yet its behaviour, limitations, and optimisation remain poorly systematised. This series provides a rigorous, benchmark-driven investigation of AI memory systems: from KV-cache fundamentals and attention memory patterns through compression techniques, architectural comparisons, and distributed caching infrastructure, to the economics of context caching and emerging paradigms that blur the line between attention memory and retrieval-augmented memory. Across 30 articles organised in four phases — Foundation & Benchmarking, Optimisation Techniques, Infrastructure, and Economics & Emerging Directions — the series builds a unified evidence base for understanding, measuring, and improving how transformer models store, retrieve, and forget information.

Articles

Technical Research · 29 published
All Articles
1
KV-Cache Fundamentals — How Transformers Remember (and Forget)  DOI  2/10 70stabilfr·wdophcgmx
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Technical Research · Mar 19, 2026 · 14 min read
2
Attention Memory Patterns — What Models Actually Store in KV-Cache  DOI  2/10 70stabilfr·wdophcgmx
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Technical Research · Mar 19, 2026 · 14 min read
3
Context Window Utilization — How Much of the Window Do Models Really Use?  DOI  2/10 65stabilfr·wdophcgmx
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Technical Research · Mar 22, 2026 · 14 min read
4
Long-Context Retrieval Benchmarks — Needle-in-Haystack and Beyond  DOI  10/10 61stabilfr·wdophcgmx
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Technical Research · Mar 22, 2026 · 10 min read
5
Memory Degradation Curves — How Accuracy Decays with Context Length  DOI  2/10 69stabilfr·wdophcgmx
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Technical Research · Mar 22, 2026 · 13 min read
6
KV-Cache Compression Benchmarks — Quantization vs Eviction vs Pruning  DOI  8/10 72stabilfr·wdophcgmx
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Technical Research · Mar 23, 2026 · 12 min read
7
Cross-Architecture Memory Comparison — Llama vs Mistral vs Gemma vs Qwen  DOI  6/10 63stabilfr·wdophcgmx
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Technical Research · Mar 23, 2026 · 11 min read
8
Prompt Caching Efficiency — Measuring Reuse Across Real Workloads  DOI  1/10 72stabilfr·wdophcgmx
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Technical Research · Mar 23, 2026 · 13 min read
9
Multi-Turn Memory — How Conversation History Degrades Model Performance  DOI  2/10 55stabilfr·wdophcgmx
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Technical Research · Mar 23, 2026 · 8 min read
10
Meta-Analysis of Context Benchmarks — Building a Unified Evaluation Framework  DOI  1/10 64stabilfr·wdophcgmx
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Technical Research · Mar 24, 2026 · 13 min read
11
Paged Attention and Virtual Memory for LLM Inference  DOI  2/10 61stabilfr·wdophcgmx
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Technical Research · Mar 24, 2026 · 15 min read
12
Grouped-Query Attention — Cache-Efficient Architecture Design  DOI  1/10 69stabilfr·wdophcgmx
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Technical Research · Mar 24, 2026 · 12 min read
13
Speculative Decoding and Cache Reuse  DOI  4/10 63stabilfr·wdophcgmx
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Technical Research · Mar 24, 2026 · 13 min read
14
Semantic Prompt Caching — Beyond Exact Match  DOI  3/10 63stabilfr·wdophcgmx
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Technical Research · Mar 24, 2026 · 12 min read
15
Token Pruning and Attention Sparsity  DOI  1/10 72stabilfr·wdophcgmx
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[a]DOI81%✓≥80% have a Digital Object Identifier
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[r]References16 refs✓Minimum 10 references required
[w]Words [REQ]2,298✓Minimum 2,000 words for a full research article. Current: 2,298
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[o]ORCID [REQ]✗✗Author ORCID verified for academic identity
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Technical Research · Mar 28, 2026 · 11 min read
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Production Cache Monitoring — Metrics and Capacity Planning (Draft — in preparation)
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Cross-Model Cache Transfer and Universal Formats (Draft — in preparation)
16
Cross-Layer KV-Cache Sharing  DOI  2/10 54stabilfr·wdophcgmx
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[t]Trusted35%○≥80% from verified, high-quality sources
[a]DOI85%✓≥80% have a Digital Object Identifier
[b]CrossRef15%○≥80% indexed in CrossRef
[i]Indexed30%○≥80% have metadata indexed
[l]Academic15%○≥80% from journals/conferences/preprints
[f]Free Access25%○≥80% are freely accessible
[r]References20 refs✓Minimum 10 references required
[w]Words [REQ]2,141✓Minimum 2,000 words for a full research article. Current: 2,141
[d]DOI [REQ]✓✓Zenodo DOI registered for persistent citation. DOI: 10.5281/zenodo.19291014
[o]ORCID [REQ]✓✓Author ORCID verified for academic identity
[p]Peer Reviewed [REQ]—✗Peer reviewed by an assigned reviewer
[h]Freshness [REQ]76%✗≥80% of references from 2025–2026. Current: 76%
[c]Data Charts4✓Original data charts from reproducible analysis (min 2). Current: 4
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[x]Cited by0○Referenced by 0 other hub article(s)
Score = Ref Trust (47 × 60%) + Required (3/5 × 30%) + Optional (3/4 × 10%)
Technical Research · Mar 28, 2026 · 11 min read
17
Sliding Window and Compressive Caching for Infinite Context  DOI  2/10 61stabilfr·wdophcgmx
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[t]Trusted35%○≥80% from verified, high-quality sources
[a]DOI83%✓≥80% have a Digital Object Identifier
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[r]References23 refs✓Minimum 10 references required
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[o]ORCID [REQ]✓✓Author ORCID verified for academic identity
[p]Peer Reviewed [REQ]—✗Peer reviewed by an assigned reviewer
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[c]Data Charts4✓Original data charts from reproducible analysis (min 2). Current: 4
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Score = Ref Trust (49 × 60%) + Required (4/5 × 30%) + Optional (3/4 × 10%)
Technical Research · Mar 28, 2026 · 11 min read
18
Flash Attention's Role in Memory-Efficient Inference  DOI  4/10 68stabilfr·wdophcgmx
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Technical Research · Mar 29, 2026 · 14 min read
19
Distributed KV-Cache in Multi-GPU Serving  DOI  3/10 75stabilfr·wdophcgmx
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Technical Research · Mar 29, 2026 · 11 min read
20
Disaggregated Prefill and Decode Architectures  DOI  2/10 71stabilfr·wdophcgmx
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Technical Research · Mar 29, 2026 · 11 min read
21
Cache-Aware Request Scheduling and Batching  DOI  1/10 74stabilfr·wdophcgmx
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Technical Research · Mar 30, 2026 · 14 min read
22
Memory Hierarchy — DRAM, HBM, and SSD-Backed Caches  DOI  1/10 53stabilfr·wdophcgmx
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Technical Research · Mar 30, 2026 · 9 min read
23
Cache Coherence in Multi-Tenant Deployments  DOI  1/10 68stabilfr·wdophcgmx
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Technical Research · Mar 30, 2026 · 12 min read
24
Production Cache Monitoring — Metrics and Capacity Planning  DOI  1/10 69stabilfr·wdophcgmx
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Technical Research · Mar 30, 2026 · 13 min read
25
The Economics of Context Caching — Cost Models and Break-Even  DOI  1/10 87stabilfr·wdophcgmx
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Technical Research · Mar 31, 2026 · 15 min read
26
Cache-Augmented Retrieval — RAG Meets KV-Cache  DOI  1/10 62stabilfr·wdophcgmx
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Technical Research · Mar 31, 2026 · 17 min read
27
Retrieval-Augmented Memory vs Pure Attention Memory  DOI  1/10 61stabilfr·wdophcgmx
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Technical Research · Mar 31, 2026 · 11 min read
28
Biological Memory Models and Their AI Analogues  DOI  1/10 51stabilfr·wdophcgmx
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[r]References17 refs✓Minimum 10 references required
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Technical Research · Mar 31, 2026 · 14 min read
29
The Future of AI Memory — From Fixed Windows to Persistent State  DOI  1/10 56stabilfr·wdophcgmx
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Technical Research · Apr 1, 2026 · 10 min read
29 published1,513 total views358 min total readingMar 2026 – Apr 2026 published

Scope

  • Foundation & Benchmarking (1–10): KV-cache fundamentals, attention memory patterns, context window utilisation, long-context retrieval benchmarks, memory degradation curves, compression benchmarks, cross-architecture comparison, prompt caching efficiency, multi-turn memory, and a meta-analysis of context benchmarks
  • Optimisation Techniques (11–18): Paged attention, grouped-query attention, speculative decoding, semantic prompt caching, token pruning, cross-layer cache sharing, sliding window and compressive caching, flash attention
  • Infrastructure (19–24): Distributed KV-cache, disaggregated prefill/decode, cache-aware scheduling, memory hierarchy (DRAM/HBM/SSD), cache coherence in multi-tenant systems, production monitoring
  • Economics & Emerging (25–30): Cost models, cache-augmented retrieval (RAG meets KV-cache), cross-model cache transfer, retrieval-augmented vs attention memory, biological memory analogues, the future of AI memory

Editorial Standards

Each article follows academic academic conventions: formal abstract, structured methodology, empirical evidence or rigorous literature synthesis, proper citations with DOIs, and reproducible analysis where applicable. The series maintains a monochrome design language consistent with the Stabilarity Research Hub editorial identity.

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Researchers and practitioners working on KV-cache optimisation, long-context inference, or memory-efficient architectures are invited to suggest topics, share benchmarks, or propose guest contributions. Contact via the GitHub repository.